IJSDR Research Journal
International Journal of Scientific Development and Research - IJSDR
(An International Open Access Journal)
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2455-2631


Issue: July 2019

Volume 4 | Issue 7

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Paper Title: DESIGN OF SENSORLESS CAPACITOR VOLTAGE BALANCING CONTROL FOR THREE-LEVEL BOOSTING PFC WITH PV SYSTEM
Authors Name: S.Ravikanth , B.V Sai Thrinath
Unique Id: IJSDR1804017
Published In: Volume 3 Issue 4, April-2018
Abstract: In this paper we compared with the conventional boosting PFC converter, the three-level boosting PFC converter has two cascaded switches and two cascaded capacitors across the dc-side voltage. Two capacitor voltages may be different due to their mismatched equivalent series resistance, their mismatched capacitance, and the mismatched conducting time of the corresponding switches. It follows that the controller needs to sense the capacitor voltages to balance both capacitor voltages. In this paper, the sensor less capacitor voltage balancing control (SCVBC) without sensing the capacitor voltages is proposed, and the total number of the feedback signals is saved. The proposed SCVBC is digitally implemented in an FPGA-based system. The provided simulated and experimental results also demonstrate the proposed SCVBC. The entire system will be performed using PV system also.
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Cite Article: "DESIGN OF SENSORLESS CAPACITOR VOLTAGE BALANCING CONTROL FOR THREE-LEVEL BOOSTING PFC WITH PV SYSTEM", International Journal of Science & Engineering Development Research (www.ijsdr.org), ISSN:2455-2631, Vol.3, Issue 4, page no.93 - 100, April-2018, Available :http://www.ijsdr.org/papers/IJSDR1804017.pdf
Downloads: 0001366
Publication Details: Published Paper ID: IJSDR1804017
Registration ID:180121
Published In: Volume 3 Issue 4, April-2018
DOI (Digital Object Identifier):
Page No: 93 - 100
Publisher: IJSDR | www.ijsdr.org
ISSN Number: 2455-2631

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