Design and Implementation of an Area Efficient Interleaver for MIMO-OFDM Systems

D.Nagaraju

MIMO-OFDM, IEEE 802.16, FEC, INTERLEAVING

This work is based on a memory-efficient and faster interleaver implementation technique for MIMO- OFDM communication systems on FPGA. The IEEE 802.16 standard is used as a reference for simulation and analysis . This is the method for interleaver design on FPGA and its memory utilization. This project work concentrate on efficient interleaver design for IEEE 802.16 system implemented on FPGA. Our goal is to achieve minimum memory us age, faster interleaving, and increased s peed of the overall system.

Published Paper   E-Certificate

"Design and Implementation of an Area Efficient Interleaver for MIMO-OFDM Systems", IJSDR - International Journal of Scientific Development and Research (www.IJSDR.org), ISSN:2455-2631, Vol.2, Issue 8, page no.44 - 48, August-2017, Available :https://ijsdr.org/papers/IJSDR1708008.pdf

Volume 2 Issue 8, August-2017

Pages : 44 - 48

Paper Reg. ID: IJSDR_170649

Published Paper Id: IJSDR1708008

Downloads: 000347034

Research Area: Engineering

Country: Saidabad, Hyderabad, Telangana, India

Published Paper PDF: https://ijsdr.org/papers/IJSDR1708008

Published Paper URL: https://ijsdr.org/viewpaperforall?paper=IJSDR1708008

ISSN: 2455-2631 | IMPACT FACTOR: 9.15 Calculated By Google Scholar | ESTD YEAR: 2016

An International Scholarly Open Access Journal, Peer-Reviewed, Refereed Journal Impact Factor 9.15 Calculate by Google Scholar and Semantic Scholar | AI-Powered Research Tool, Multidisciplinary, Monthly, Multilanguage Journal Indexing in All Major Database & Metadata, Citation Generator

Publisher: IJSDR(IJ Publication) Janvi Wave

This work is licensed under a Creative Commons Attribution 4.0 International License and The Open Definition