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IJSDR
INTERNATIONAL JOURNAL OF SCIENTIFIC DEVELOPMENT AND RESEARCH
International Peer Reviewed & Refereed Journals, Open Access Journal
ISSN Approved Journal No: 2455-2631 | Impact factor: 8.15 | ESTD Year: 2016
open access , Peer-reviewed, and Refereed Journals, Impact factor 8.15

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Impact factor: 8.15

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Paper Title: Power Reduction in Logic Gates using SAPON and LCNT techniques.
Authors Name: M. Veena , Ch. Suneetha , N. Anurag , M. Tarun Reddy
Unique Id: IJSDR2306231
Published In: Volume 8 Issue 6, June-2023
Abstract: Logic gates serve as the efficient powerhouses of modern electronics, optimizing energy consumption and extending battery life in smartphones, laptops, and wearable devices. Two cutting-edge strategies methods, namely Leakage Control NMOS Transistor (LCNT) and Stackly Arranged low Power ON transistor (SAPON), are employed to enhance the power efficiency of the logic gates. The LCNT technique minimizes power consumption by increasing resistance along the path between the supply voltage (Vdd) and the ground (GND). On the other hand, SAPON prevents leakage current during the changeover stage, further reducing power consumption in the logic gate circuits. These circuits are implemented and analyzed using the Cadence tool with 45nm technology.
Keywords: Leakage Control NMOS Transistor (LCNT), Stackly Arranged low Power ON transistor (SAPON), Very Large-Scale Integration (VLSI).
Cite Article: "Power Reduction in Logic Gates using SAPON and LCNT techniques.", International Journal of Science & Engineering Development Research (www.ijsdr.org), ISSN:2455-2631, Vol.8, Issue 6, page no.1717 - 1722, June-2023, Available :http://www.ijsdr.org/papers/IJSDR2306231.pdf
Downloads: 000337350
Publication Details: Published Paper ID: IJSDR2306231
Registration ID:207422
Published In: Volume 8 Issue 6, June-2023
DOI (Digital Object Identifier):
Page No: 1717 - 1722
Publisher: IJSDR | www.ijsdr.org
ISSN Number: 2455-2631

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